Files
reverse-engineering-anything/tests/conformance/esp/bootloader.ld
T
Entrpi 546119b63e feat(artifacts): inventory and extract ESP32 firmware images
ESP32-family app and bootloader images (magic 0xE9) had no reader, so
open_binary refused OTA downloads, app partitions and bootloaders.

Add the esp-image container format behind inspect_artifact and
extract_artifact. A pure decoder reads each byte once and keeps only
fixed-size fields. Derived facts cover the chip, from a table cited to
ESP-IDF v6.1; segment classification as ESP-IDF's should_map and
should_load; checksum and appended SHA-256 results; app and bootloader
descriptors; Secure Boot v2 signature blocks, observed and unverified;
and undescribed trailing byte ranges. Truncation and undescribed bytes
make coverage unknown. ESP8266 images are refused with a specific
reason, and ciphertext stays unrecognized.

Add the format to every target, Evidence, snapshot, live-summary and
artifact vocabulary, document it, and add an optional verify:esp-images
lane that compares esptool-built images with esptool image-info and
espsecure signature-info-v2.

Refs #3615
2026-10-27 22:54:29 +11:00

19 lines
555 B
Plaintext

ENTRY(rea_entry)
/*
* RAM-only ESP32-C3 layout, as a second-stage bootloader has. The addresses
* are in the DRAM and IRAM ranges of ESP-IDF v6.1
* components/soc/esp32c3/include/soc/soc.h.
*/
PHDRS
{
dram PT_LOAD;
iram PT_LOAD;
}
SECTIONS
{
.dram0.bootdesc 0x3FCD5820 : { KEEP(*(.dram0.bootdesc)) } :dram
.dram0.data : { *(.dram0.data) *(.data .data.* .sdata .sdata.*) *(.rodata .rodata.* .srodata .srodata.*) } :dram
.iram_loader.text 0x403CC710 : { *(.iram_loader.text) *(.text .text.*) } :iram
/DISCARD/ : { *(.comment) *(.note.*) }
}